| Job
List |
| Job
ID: |
Job-0190
- ANALOG DESIGN Rad-Hard |
| Primary Skills: |
Linear/mixed signal circuit design,
circuit simulation tools |
| Optional Skills: |
Space or strategic radiation hard
design |
| Description: |
Responsibilities will include electronic
device, circuit and systems radiation hardness evaluation by testing
and alalysis for strategic and space system applications. This
individual must have a solid background in semiconductor device
physics, linear/mixed signal circuit design and circuit simulation
tools.
Minimum BS in EE or Physics.....experience in Rad hard
design a plus.
This position requires the ability to obtain a
US. Security Clearance.
For more info contact Ron at
603-893-9486 |
| |
Salary: Open, Total Exp:
3-5+, Location: Boston |
| Go to Top |
Respond
to this Job by Web Form |
|
| Job
ID: |
Job-0191
- Place and Route Engineer |
| Primary Skills: |
Cadence Encounter, Cadence RCS, Mixed
Signal |
| Description: |
Contract position with possibility of going
direct at some point.
Flexible hours....ability to work from home
at least part time.
Your responsibilities will include taking
the lead on the physical assembly of complex mixed-signal chips.
This will include interfacing with layout engineers, digital place
and route using Cadence Encounter, parasitic extraction using
Cadence RCX, block assembly using SKIL scripts, integration of IP
blocks such as PADS, and contributing to leaf cell layouts when
expedient.
Desired Qualifications
* BSEE + 10 years IC
design
· Mixed-signal block level floor planning experience
desirable
· Experience in physical implementation of mixed-signal
blocks
· Expertise in Cadence Encounter standard cell
place-and-route all the way from getting level netlist into the tool
to tape-out ready timing closed GDS out
· Ability to construct
and debug SDC as well as analyze and fix timing paths in
Encounter
· Knowledge of Assura LVS, DRC and RTL
synthesis
* Experience with RCX extraction
·
Experience with Skill scripting to auto-generate schematics, layout,
and pcells
* Fluent in Verilog
* Experience integrating
silicon IP at top level such as pads, etc.
* Experience managing
layout engineers
* Ability to contribute to layouts when
necessary
* Experience with CMOS transistor-level circuits
*
Experience with Cadence SKIL scripting is a plus
* Good written
and verbal communications skills
* Solid problem-solving and
trouble-shooting skills
* Enjoy tinkering, taking things apart,
and making things work
* Ability to ask good questions
*
Experience working in a start-up environment
* US citizenship or
Visa |
| |
Salary: open, Location:
CAmbridge, ma |
| Go to Top |
Respond
to this Job by Web Form |
|
| Job
ID: |
Job-0192
- RF CMOS design |
| Primary Skills: |
cmos mixed signal design, simulation,
layout, verification |
| Secondary Skills: |
verilog AMS, Cadence SKILL, MATLAB,
C/C++ |
| Description: |
Your primary responsibility will be to
design analog and mixed-signal circuits in CMOS that operate in the
microwave to millimeter wave bands. You will participate in key
technical decisions and design reviews. You will be responsible for
circuit analysis, design, simulation, layout, verification, and
testing.
Required Qualifications
MSEE or PhD in
electrical engineering
Experience with design, simulation and
layout of analog and mixed-signal integrated circuits
Solid
understanding of CMOS device physics and circuit analysis
High
level of analytical sophistication
Proven track record of
successful product development
Good written and verbal
communications skills
Solid problem-solving and trouble-shooting
skills
Highly motivated and be able to work both independently
and as a team member
Proficiency with Cadence and Mentor Graphics
tools
Desired Qualifications
5 or more years of
professional experience
Experience with Verilog-AMS
modeling
Familiar with Cadence SKILL language
Experience in
MATLAB, C/C++ and Java languages
Experience in scripting language
like Perl and Tcl
Experience working in a start-up
environment
US citizenship or permanent resident
|
| |
Salary: open doe,
Location: Massachusetts |
| Go to Top |
Respond
to this Job by Web Form |
|
| Job
ID: |
Job-0193
- DDR3 High Speed I/O Designer |
| Primary Skills: |
DDR3/DDR2 I/O and memory designer (should
be capable in 90 nm and 65 nm and below) |
| Description: |
DDR3/DDR2 I/O and memory designer (should
be capable in 90 nm and 65 nm and below) – location
Austin
800 mhz DDR memory controller |
| |
Salary: DOE, Location:
Austin, Texas |
| Go to Top |
Respond
to this Job by Web Form |
|
| Job
ID: |
Job-0194
- Verification Engineer |
| Primary Skills: |
Verification/Test |
| Description: |
This person would have the ability to
suggest ways for the designers to improve the design and in a way
provide a test/quality function. This person would have to be
familiar with analog CMOS and high frequency layouts and be
essentially a “super designer”.
Position is in Massachusetts
with a proven startup team. Available immediately.
|
| |
Salary: DOE, Start Date:
asap, Location: Massachusetts |
| Go to Top |
Respond
to this Job by Web Form |
|
| Job
ID: |
Job-0195
- Product/Quality Engineer |
| Primary Skills: |
Detailed understanding of diagnostic,
product test, failure analysis, and debug techniques. |
| Secondary Skills: |
Memory experience |
| Description: |
Product and RQC Engineer – location
Phoenix
a. Provide engineering support for product line
through all phases of product development and manufacturing.
·
Work closely with test and process engineers during bring-up and
production release to drive debug activities and reliability
qualification.
· Coordinate and drive new product qualification
and transfer to manufacturing.
· Closely monitor product assembly
and final test flow and yields.
· Support manufacturing yield
enhancement, quality improvement, and cost reduction programs.
·
Drive root cause analysis of any customer returns or field
failures.
· Provide Quality Assurance support for
customers.
Experience Required
· BS or MS in electrical
engineering with 5+ years of product engineering experience.
·
Detailed understanding of diagnostic, product test, failure
analysis, and debug echniques.
· Demonstrated ability to take
semiconductor IC’s into production.
· Self starter with strong
leadership, communication skills and demonstrated problem solving
ability.
· Memory experience desirable. |
| |
Salary: DOE, Start Date:
asap, Location: Phoenix, AZ |
| Go to Top |
Respond
to this Job by Web Form |
|